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 Home > Business > Test Service
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| DOOSAN TESNA provides total test service ranging from test program development to probe, final test, and backend service.It has strategic partnership with major assembly houses in Korea to provide turn-key solution, including assembly. |
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 Test Program Development
Wafer Probe Test
Package Final Test
Backend Service
Turn-Key Service |
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| DOOSAN TESNA develops and provides test programs for various system semiconductors such as SoC, |
| logic, analog, and mixed signal. It provides customers at home and abroad with various services based on its test program |
| development capability for system semiconductor products of fabless companies. |
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Develop the optimal test program for reducing test cost
Develop test programs which take minimum time to reduce time to market |
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| DOOSAN TESNA provides wafer probe test service from wafer probe card design, and test program development 6 to 12 inch verification & characterization. Wafer probe temperature ranges from -40 °C to 150 °C with capability of handling 6-12inch wafers. In addition, DOOSAN TESNA provides customer service for them to check test results in real time online through test web reports. Also, DOOSAN TESNA has in-house probe card repair shop in production lines to guarantee the best quality and to improve productivity. |
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Probe card design
Test program development and conversion
First Silicon verification and characterization
Device characterization
Mass production of off-line Inking and Wafer Map (CSV, Simax, Semi GBI, Semi GBS, etc.) |
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At DOOSAN TESNA, various package tests are available from small packages under 3*3 size to high pin count, including PDIP, PLCC, SOP, TSOP, QFP, LQFP, TQFP, QFN, BGA LGA, CSP, and TSV. It also provides the best final test services such as load board design, interface hardware design, test program development and conversion, device characterization, and mass production. It runs a special line dedicated for CMOS Image Sensor test under class 100. |
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Load board interfacing hardware (Fixture Change kit, socket) design
Test program development and conversion
Device characterization |
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| For tested goods without defects, DOOSAN TESNA provides lead ball scan, tape and reel, bake & dry pack service. It also provides finished goods storage and logistics service which ships goods to a location requested by a customer.
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Lead Scan : A process to screen lead and ball defects for good packages
Tape & Reel : Tape & Reel Service
Bake & Dry Pack : A process to prevent package defects caused by humidity
Finished Good Store : Service that stores tested goods until shipment
Drop Shipment : Service that ships goods to a location requested by a customer |
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DOOSAN TESNA has strategic partnerships with major assembly companies in Korea to provide turn-key service which covers total
test service including assembly. |
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| One stop backend turn-Key Service : Wafer Probe Test -> Assembly -> Package Final Test -> Backend Service
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| The process of flowing the specified current, cutting the fuse and verifying the fusing status.
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| Fusing Service : Incoming -> Fusing -> Outgoing -> Packing -> Shipping |
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We offer a service for sorting good chips on a wafer into the arrangement or wafer size required by the customer.
Our CIS products, which are sensitive to contaminants, are processed in a Class 10 clean environment.
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We rearrange the chips to match the wafer size of the packaging equipment owned by the customer.
By sorting only good chips, we can supply wafers with a high yield, which can improve the workability of subsequent processes.
After sorting the good chips, we conduct an AVI inspection to detect additional appearance defects that are not detected during
the wafer probe test.
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| We provide a service for sorting good chips on a wafer into the tray size required by the customer. |
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We rearrange the chips to match the tray size of the packaging equipment owned by the customer (Tray Sizes: 2”, 3”, 4”).
After sorting the good chips, we conduct an AVI inspection to detect additional appearance defects that are not detected during
the wafer probe test.
Additionally, we offer the laser grooving method as a major optional process.
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| We offer a method for protecting the wafer surface by performing sawing and reconstruction processes without removing the tape attached for the B/G process, as an alternative to the coating method in the CIS reconstruction process. |
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Environmentally friendly process (no use of coating and removal chemicals)
Improved cost competitiveness (reduced number of processes, reduced raw materials)
Improved yield (reduced occurrence of contaminants, residues, and scratches during the reconstruction process)
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| We provide productivity improvement and the highest quality through a differentiated dicing method for SiC wafers. |
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We enhance productivity by applying ultrasonic saws (approximately 10 times compared to normal blade saws).
We offer excellent product quality (lateral crack-free when laser grooving is applied).
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